21 Nov Ayar Labs chosen as optical partner in Intel’s DARPA PIPES project
21 Nov 2019
Optical communications accelerator also announces customer sampling program this week at Supercomputing.
Ayar Labs has been selected as Intel’s optical I/O solution partner for their recently awarded DARPA’s PIPES optical communications research project. The goal of PIPES – Photonics in Package for Extreme Scalability – is to develop integrated optical transceiver solutions co-packaged with next-generation FPGA/CPU/GPU (optical signal processors) and accelerators in multi-chip packages to provide “extreme” optical data transmission rates at ultra-low power over much longer distances than is supported by current technology.
Ayar Labs, based in Emeryville, Ca, is working to drive a 1000x improvement in interconnect bandwidth density at 10x lower power. Its approach uses silicon processing techniques to develop high speed, optical based interconnect “chiplets” and lasers to replace traditional communications electronics.
In the first phase of the PIPES project, the Ayar’s TeraPHY chiplet will be co-packaged with an Intel FPGA processor using the so-called Advanced Interconnect Bus interface and Intel’s EMIB silicon-bridge packaging.
Vince Hu, VP of Strategy & Innovation for Intel’s FPGA products, commented, “We’re seeing an explosion of datacenter workloads that have an insatiable demand for bandwidth and the need to connect devices at rack-scale distances. The best way to do that is with optical interconnects and Ayar Labs chiplets, which enables very high bandwidth at low latency and low power consumption.”
“We are excited to work with Ayar Labs to continue disrupting the market by combining our next generation 45nm platform, targeted to future CMOS-based photonics solutions, with their differentiated technology that will push the limits of chip communication bandwidth for computing, cloud and AI applications.”
Charles Wuischpard, CEO of Ayar Labs, said, “Bringing optical connectivity all the way into the CPU/SOC package has long been one of the Holy Grails in high performance and hyperscale computing, as it unleashes the performance of ever more powerful computing and network processors and removes a major bottleneck and set of constraints in systems architecture and design.”
“Furthermore, the energy consumed in moving data through a system is now very significant and growing, and the best way to manage that is to move the data optically from end to end. We are pleased to be selected by Intel as the optical solution for their DARPA PIPES project and look forward to a multi-year collaboration.”
The TeraPHY chiplet is manufactured on Global Foundries’ 45nm platform, which enabled Ayar Labs to build a monolithic, single-die solution that integrates both electrical and optical photonic circuits and devices on a single chip.
“We have worked in close collaboration with Ayar Labs to deliver a new class of integrated electronic, photonics solutions,” said Anthony Yu, vice president of Computing & Wired Infrastructure at GF.
“Going forward, we’re excited to work with the pioneers at Ayar Labs to continue disrupting the market by combining our next generation 45nm platform, targeted to future CMOS-based photonics solutions, with their differentiated technology that will push the limits of chip communication bandwidth for high-performance computing, cloud and AI applications.”
As announced earlier this year, Ayar Labs has developed its first fully integrated TeraPHY chiplet and will be demonstrating the solution at the Supercomputing 2019 conference (November 17-22, in Denver, CO).
The company is also announcing its Customer Sampling Program with select semiconductor makers, OEM systems builders, telco equipment Manufacturers, and end users starting in early Q1 2020. The program is geared towards demonstrating both the capability of the technology as well as cementing co-design partnerships for future systems architectures in compute, network, and memory. Please contact the company for more details and qualification criteria.