Lockheed backs optical interconnects with Ayar Labs investment

Lockheed backs optical interconnects with Ayar Labs investment

11 Mar 2020

Strategic funding intended to help accelerate commercialization of new high-speed photonic links.

Ayar Labs, a Silicon Valley startup with the stated aim of “enabling the next phase of Moore’s law through optical connectivity”, says it has received strategic investment from the venture wing of the giant US military contractor Lockheed Martin.

Without disclosing the precise amount invested, Ayar said that the additional money will be used to accelerate the commercialization of its patented monolithic in-package optical I/O (MIPO) technology.

Aimed at applications demanding high bandwidth, low latency and power-efficient short reach interconnects, the target markets include artificial intelligence, high-performance computing, and digital beam-forming for radar.

DARPA project spin-out
News of the Lockheed support comes after earlier investments by Intel Capital and the chip manufacturer Global Foundries. Ayar also lists Founders Fund and Playground Capital as investors, while last April it secured a $3 million term loan from Silicon Valley Bank.

Set up in 2015, Ayar emerged from a decade-long collaboration between researchers at MIT, UC Berkeley, and Colorado University in Boulder, with funding from the US Defense Advanced Research Projects Agency (DARPA) via its “POEM” development effort.

Short for “photonically optimized embedded microprocessors”, its aim was to demonstrate photonic technologies that could be integrated within embedded microprocessors to provide seamless, energy-efficient, high-capacity communications within and between microprocessors and DRAM memory chips.

The abstract for the DARPA program stated: “It is envisioned that POEM technology will be especially useful to military platforms where extreme performance coupled with low size, weight, and power is a necessity (e.g. UAVs, and satellites).”

Via that program, what became Ayar Labs created technology that is said to overcome power/performance scaling challenges of semiconductors, as well as the interconnect bandwidth bottleneck between devices.

Vertical grating couplers
The company has previously described efforts to commercialize its “TeraPHY” optical I/O chiplets and “SuperNova” multi-wavelength lasers. A technical presentation from last August described the silicon photonics technology that forms the basis of Ayar’s approach, combined with evanescent coupling between adjacent waveguides.

TeraPHY also uses vertical grating couplers to get light on and off the chip, and couple it into optical fiber, and micro-ring modulators and detectors to convert data to and from the electrical and optical domains.

According to the same presentation, the compact size of those micro-ring devices, which are monolithically integrated with CMOS transistors, leads to large bandwidth density and high energy efficiency – with clocking, drivers, transimpedance amplifiers (TIAs), and control circuitry all integrated on same chip as the optical devices.

Back in 2015, the POEM development team reported in the journal Nature that they had built an electronic-photonic system on a single chip that integrated more than 70 million transistors and 850 photonic components to provide logic, memory, and interconnect functions.

Since then, the company has used that base technology in a number of engineering demonstrations, delivering a bandwidth density of more than 500 Gb/s per square millimeter of chiplet area.

It means that each TeraPHY chiplet – measuring less than 10 mm by 6 mm – can support ten tiny transceiver elements that couple directly to an optical fiber array, something that the company believes will offer a 1000-fold improvement in interconnect bandwidth density, alongside an order-of-magnitude reduction in power consumption.

The approach also supports the use of in-package optics, which Ayar says will “fundamentally break the traditional bandwidth-distance trade-off and support new high-performance computer architectures”.

Moving to market
Late last year the company indicated its move towards production scaling when it hired former Xilinx and Rambus senior engineer Ken Chang as its new senior VP of engineering. CEO Charles Wuischpard said at the time:

“Ken has decades of experience in bringing high speed I/O products to market as well as leading and growing world class engineering organizations. He joins Ayar Labs at a seminal moment as the industry prepares to transition to in-package optical I/O to meet growing workload demands and maintain Moore’s law scaling.”

Commenting on the new Lockheed support, Wuischpard added: “Working with key system integrators like Lockheed Martin, who really understand the value of our solution and how to design it into future complex systems, is incredibly important. In that sense, we view this relationship as more than funding alone, but as an important long-term working relationship as well.”

Chris Moran, executive director and general manager at Lockheed Martin Ventures, said: “We are very excited to add Ayar Labs to our investment portfolio and look forward to working with them and gaining access to their in-package optical interconnect that could provide business and technical value across our business units.”

Having publicly unveiled the TeraPHY chiplet technology at last year’s Supercomputing 2019 conference, Ayar says it is now working with select semiconductor manufacturers, OEM systems builders, and end users on sampling and co-design partnerships this year.

The technology is also being used in DARPA’s “Photonics in Package for Extreme Scalability” (PIPES) development project. Co-packaged with Intel’s electronics, the chiplets are being made by Global Foundries.

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